Support Forum Articles File Help Startup DB Tips Service DB Hijack This! Analyzer


Memory Timings Explained

Now days it seems like everybody is tweaking their systems to get every last bit of performance out of them. Something that is often overlooked that plays a significant rold in your systems performance is memory bandwidth. This is a very tricky thing, sometimes a lower bus speed with faster timings is considerably better than just increasing your bus speed. When you are shopping for RAM you don't want to buy just cas 2 RAM. It is possible that you can get 2/3/3 RAM. You want to make sure you get good stuff. All 3 of these timings will greatly affect your system performance. You'll want to make sure you get 2/2/2 RAM what do these 3 numbers mean?

The first number is the CAS latency. The second number is the TRCD. The last number is the TRP. What on earth are these things and why do they affect my performance so much? That's exactly why I've written this article. Here we will try and explain to you what these different settings you see all the time do and try to help you have a better understanding of why these make your system go so much faster.

Cas Latency

CAS means Column Address Strobe. The Webster's Dictionary defines latency as "the interval between stimulus and response" just in case that word isn't familiar to you.

This controls the timing delay (in clock cycles) before the RAM starts a read command after receiving it. Settings are usually 2 or 2.5 This setting has more affect on system performance than any other RAM setting. Since this is the number of cycles the CAS needs to find the correct address of the data that it is looking for. That is why your entire system runs quite a bit faster when the data can be fetched in 2 cycles rather than 2.5.

I'll pull a quote from a guide from Corsair who BTW makes the XMS line of memory that I certainly approve of for high speeds and good timings.

"To understand this let's walk through a simplified version of how the memory controller actually reads the memory. First, the chip set accesses the ROW of the memory matrix by putting an address on the memory's address pins and activating the RAS signal. Then, we have to wait a few clock cycles (known as RAS-to-CAS Delay). Then, the column address is put on the address pins, and the CAS signal is activated, to access the correct COLUMN of the memory matrix. Then, we wait a few clock cycles -- THIS IS KNOWN AS CAS LATENCY! -- and then the data appears on the pins of the RAM."

RAS to CAS Delay (TRCD) This field allows you to set the number of cycles for a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from or refreshed. Lower settings result in faster performance. 3T, 2TBank Interleave

TRP  indicates how fast SDRAM can terminate one row access and starts another one.

Written By: Martin Krohn
Date: 2-29-04
Printer Friendly

Article Index:
Page 2 -->